Still a lot of bugs :(
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704eae3bb0
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27 changed files with 308 additions and 95 deletions
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@ -1,13 +1,14 @@
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use super::CharDevice;
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use crate::sync::{Condvar, UPSafeCell};
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use alloc::collections::VecDeque;
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use bitflags::*;
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use volatile::{ReadOnly, Volatile, WriteOnly};
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///! Ref: https://www.lammertbies.nl/comm/info/serial-uart
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///! Ref: ns16550a datasheet: https://datasheetspdf.com/pdf-file/605590/NationalSemiconductor/NS16550A/1
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///! Ref: ns16450 datasheet: https://datasheetspdf.com/pdf-file/1311818/NationalSemiconductor/NS16450/1
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use super::CharDevice;
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use crate::sync::{Condvar, UPIntrFreeCell};
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use crate::task::schedule;
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use alloc::collections::VecDeque;
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use bitflags::*;
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use volatile::{ReadOnly, Volatile, WriteOnly};
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bitflags! {
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/// InterruptEnableRegister
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pub struct IER: u8 {
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@ -125,7 +126,7 @@ struct NS16550aInner {
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}
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pub struct NS16550a<const BASE_ADDR: usize> {
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inner: UPSafeCell<NS16550aInner>,
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inner: UPIntrFreeCell<NS16550aInner>,
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condvar: Condvar,
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}
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@ -137,7 +138,7 @@ impl<const BASE_ADDR: usize> NS16550a<BASE_ADDR> {
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};
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inner.ns16550a.init();
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Self {
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inner: unsafe { UPSafeCell::new(inner) },
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inner: unsafe { UPIntrFreeCell::new(inner) },
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condvar: Condvar::new(),
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}
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}
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@ -145,13 +146,16 @@ impl<const BASE_ADDR: usize> NS16550a<BASE_ADDR> {
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impl<const BASE_ADDR: usize> CharDevice for NS16550a<BASE_ADDR> {
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fn read(&self) -> u8 {
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println!("NS16550a::read");
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loop {
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let mut inner = self.inner.exclusive_access();
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if let Some(ch) = inner.read_buffer.pop_front() {
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return ch;
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} else {
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println!("no ch yet!");
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let task_cx_ptr = self.condvar.wait_no_sched();
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drop(inner);
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self.condvar.wait();
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schedule(task_cx_ptr);
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}
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}
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}
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@ -163,10 +167,12 @@ impl<const BASE_ADDR: usize> CharDevice for NS16550a<BASE_ADDR> {
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let mut inner = self.inner.exclusive_access();
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let mut count = 0;
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while let Some(ch) = inner.ns16550a.read() {
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println!("got {}", ch as char);
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count += 1;
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inner.read_buffer.push_back(ch);
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}
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drop(inner);
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//assert_eq!(count, 1);
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if count > 0 {
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self.condvar.signal();
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}
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