Merge branch 'ch9' into main

os/src/drivers/block/mod.rs

@@ -1,13 +1,13 @@
 mod sdcard;
 mod virtio_blk;
 
-pub use virtio_blk::VirtIOBlock;
 pub use sdcard::SDCardWrapper;
+pub use virtio_blk::VirtIOBlock;
 
+use crate::board::BlockDeviceImpl;
 use alloc::sync::Arc;
 use easy_fs::BlockDevice;
 use lazy_static::*;
-use crate::board::BlockDeviceImpl;
 
 lazy_static! {
     pub static ref BLOCK_DEVICE: Arc<dyn BlockDevice> = Arc::new(BlockDeviceImpl::new());

os/src/drivers/block/sdcard.rs

@@ -3,7 +3,7 @@
 #![allow(unused)]
 
 use super::BlockDevice;
-use crate::sync::UPSafeCell;
+use crate::sync::UPIntrFreeCell;
 use core::convert::TryInto;
 use k210_hal::prelude::*;
 use k210_pac::{Peripherals, SPI0};
@@ -715,8 +715,8 @@ fn io_init() {
 }
 
 lazy_static! {
-    static ref PERIPHERALS: UPSafeCell<Peripherals> =
-        unsafe { UPSafeCell::new(Peripherals::take().unwrap()) };
+    static ref PERIPHERALS: UPIntrFreeCell<Peripherals> =
+        unsafe { UPIntrFreeCell::new(Peripherals::take().unwrap()) };
 }
 
 fn init_sdcard() -> SDCard<SPIImpl<SPI0>> {
@@ -740,11 +740,11 @@ fn init_sdcard() -> SDCard<SPIImpl<SPI0>> {
     sd
 }
 
-pub struct SDCardWrapper(UPSafeCell<SDCard<SPIImpl<SPI0>>>);
+pub struct SDCardWrapper(UPIntrFreeCell<SDCard<SPIImpl<SPI0>>>);
 
 impl SDCardWrapper {
     pub fn new() -> Self {
-        unsafe { Self(UPSafeCell::new(init_sdcard())) }
+        unsafe { Self(UPIntrFreeCell::new(init_sdcard())) }
     }
 }
 
@@ -761,4 +761,7 @@ impl BlockDevice for SDCardWrapper {
             .write_sector(buf, block_id as u32)
             .unwrap();
     }
+    fn handle_irq(&self) {
+        unimplemented!();
+    }
 }

os/src/drivers/block/virtio_blk.rs

@@ -3,42 +3,92 @@ use crate::mm::{
     frame_alloc, frame_dealloc, kernel_token, FrameTracker, PageTable, PhysAddr, PhysPageNum,
     StepByOne, VirtAddr,
 };
-use crate::sync::UPSafeCell;
+use crate::sync::{Condvar, UPIntrFreeCell};
+use crate::task::schedule;
+use crate::DEV_NON_BLOCKING_ACCESS;
+use alloc::collections::BTreeMap;
 use alloc::vec::Vec;
 use lazy_static::*;
-use virtio_drivers::{VirtIOBlk, VirtIOHeader};
+use virtio_drivers::{BlkResp, RespStatus, VirtIOBlk, VirtIOHeader};
 
 #[allow(unused)]
 const VIRTIO0: usize = 0x10001000;
 
-pub struct VirtIOBlock(UPSafeCell<VirtIOBlk<'static>>);
+pub struct VirtIOBlock {
+    virtio_blk: UPIntrFreeCell<VirtIOBlk<'static>>,
+    condvars: BTreeMap<u16, Condvar>,
+}
 
 lazy_static! {
-    static ref QUEUE_FRAMES: UPSafeCell<Vec<FrameTracker>> = unsafe { UPSafeCell::new(Vec::new()) };
+    static ref QUEUE_FRAMES: UPIntrFreeCell<Vec<FrameTracker>> = unsafe { UPIntrFreeCell::new(Vec::new()) };
 }
 
 impl BlockDevice for VirtIOBlock {
     fn read_block(&self, block_id: usize, buf: &mut [u8]) {
-        self.0
-            .exclusive_access()
-            .read_block(block_id, buf)
-            .expect("Error when reading VirtIOBlk");
+        let nb = *DEV_NON_BLOCKING_ACCESS.exclusive_access();
+        if nb {
+            let mut resp = BlkResp::default();
+            let task_cx_ptr = self.virtio_blk.exclusive_session(|blk| {
+                let token = unsafe { blk.read_block_nb(block_id, buf, &mut resp).unwrap() };
+                self.condvars.get(&token).unwrap().wait_no_sched()
+            });
+            schedule(task_cx_ptr);
+            assert_eq!(
+                resp.status(),
+                RespStatus::Ok,
+                "Error when reading VirtIOBlk"
+            );
+        } else {
+            self.virtio_blk
+                .exclusive_access()
+                .read_block(block_id, buf)
+                .expect("Error when reading VirtIOBlk");
+        }
     }
     fn write_block(&self, block_id: usize, buf: &[u8]) {
-        self.0
-            .exclusive_access()
-            .write_block(block_id, buf)
-            .expect("Error when writing VirtIOBlk");
+        let nb = *DEV_NON_BLOCKING_ACCESS.exclusive_access();
+        if nb {
+            let mut resp = BlkResp::default();
+            let task_cx_ptr = self.virtio_blk.exclusive_session(|blk| {
+                let token = unsafe { blk.write_block_nb(block_id, buf, &mut resp).unwrap() };
+                self.condvars.get(&token).unwrap().wait_no_sched()
+            });
+            schedule(task_cx_ptr);
+            assert_eq!(
+                resp.status(),
+                RespStatus::Ok,
+                "Error when writing VirtIOBlk"
+            );
+        } else {
+            self.virtio_blk
+                .exclusive_access()
+                .write_block(block_id, buf)
+                .expect("Error when writing VirtIOBlk");
+        }
+    }
+    fn handle_irq(&self) {
+        self.virtio_blk.exclusive_session(|blk| {
+            while let Ok(token) = blk.pop_used() {
+                self.condvars.get(&token).unwrap().signal();
+            }
+        });
     }
 }
 
 impl VirtIOBlock {
-    #[allow(unused)]
     pub fn new() -> Self {
-        unsafe {
-            Self(UPSafeCell::new(
-                VirtIOBlk::new(&mut *(VIRTIO0 as *mut VirtIOHeader)).unwrap(),
-            ))
+        let virtio_blk = unsafe {
+            UPIntrFreeCell::new(VirtIOBlk::new(&mut *(VIRTIO0 as *mut VirtIOHeader)).unwrap())
+        };
+        let mut condvars = BTreeMap::new();
+        let channels = virtio_blk.exclusive_access().virt_queue_size();
+        for i in 0..channels {
+            let condvar = Condvar::new();
+            condvars.insert(i, condvar);
+        }
+        Self {
+            virtio_blk,
+            condvars,
         }
     }
 }

os/src/drivers/chardev/mod.rs

@@ -0,0 +1,17 @@
+mod ns16550a;
+
+pub use ns16550a::NS16550a;
+
+use crate::board::CharDeviceImpl;
+use alloc::sync::Arc;
+use lazy_static::*;
+
+pub trait CharDevice {
+    fn read(&self) -> u8;
+    fn write(&self, ch: u8);
+    fn handle_irq(&self);
+}
+
+lazy_static! {
+    pub static ref UART: Arc<CharDeviceImpl> = Arc::new(CharDeviceImpl::new());
+}

os/src/drivers/chardev/ns16550a.rs

@@ -0,0 +1,176 @@
+///! Ref: https://www.lammertbies.nl/comm/info/serial-uart
+///! Ref: ns16550a datasheet: https://datasheetspdf.com/pdf-file/605590/NationalSemiconductor/NS16550A/1
+///! Ref: ns16450 datasheet: https://datasheetspdf.com/pdf-file/1311818/NationalSemiconductor/NS16450/1
+
+use super::CharDevice;
+use crate::sync::{Condvar, UPIntrFreeCell};
+use crate::task::schedule;
+use alloc::collections::VecDeque;
+use bitflags::*;
+use volatile::{ReadOnly, Volatile, WriteOnly};
+
+bitflags! {
+    /// InterruptEnableRegister
+    pub struct IER: u8 {
+        const RX_AVALIABLE = 1 << 0;
+        const TX_EMPTY = 1 << 1;
+    }
+
+    /// LineStatusRegister
+    pub struct LSR: u8 {
+        const DATA_AVAILABLE = 1 << 0;
+        const THR_EMPTY = 1 << 5;
+    }
+
+    /// Model Control Register
+    pub struct MCR: u8 {
+        const DATA_TERMINAL_READY = 1 << 0;
+        const REQUEST_TO_SEND = 1 << 1;
+        const AUX_OUTPUT1 = 1 << 2;
+        const AUX_OUTPUT2 = 1 << 3;
+    }
+}
+
+#[repr(C)]
+#[allow(dead_code)]
+struct ReadWithoutDLAB {
+    /// receiver buffer register
+    pub rbr: ReadOnly<u8>,
+    /// interrupt enable register
+    pub ier: Volatile<IER>,
+    /// interrupt identification register
+    pub iir: ReadOnly<u8>,
+    /// line control register
+    pub lcr: Volatile<u8>,
+    /// model control register
+    pub mcr: Volatile<MCR>,
+    /// line status register
+    pub lsr: ReadOnly<LSR>,
+    /// ignore MSR
+    _padding1: ReadOnly<u8>,
+    /// ignore SCR
+    _padding2: ReadOnly<u8>,
+}
+
+#[repr(C)]
+#[allow(dead_code)]
+struct WriteWithoutDLAB {
+    /// transmitter holding register
+    pub thr: WriteOnly<u8>,
+    /// interrupt enable register
+    pub ier: Volatile<IER>,
+    /// ignore FCR
+    _padding0: ReadOnly<u8>,
+    /// line control register
+    pub lcr: Volatile<u8>,
+    /// modem control register
+    pub mcr: Volatile<MCR>,
+    /// line status register
+    pub lsr: ReadOnly<LSR>,
+    /// ignore other registers
+    _padding1: ReadOnly<u16>,
+}
+
+pub struct NS16550aRaw {
+    base_addr: usize,
+}
+
+impl NS16550aRaw {
+    fn read_end(&mut self) -> &mut ReadWithoutDLAB {
+        unsafe { &mut *(self.base_addr as *mut ReadWithoutDLAB) }
+    }
+
+    fn write_end(&mut self) -> &mut WriteWithoutDLAB {
+        unsafe { &mut *(self.base_addr as *mut WriteWithoutDLAB) }
+    }
+
+    pub fn new(base_addr: usize) -> Self {
+        Self { base_addr }
+    }
+
+    pub fn init(&mut self) {
+        let read_end = self.read_end();
+        let mut mcr = MCR::empty();
+        mcr |= MCR::DATA_TERMINAL_READY;
+        mcr |= MCR::REQUEST_TO_SEND;
+        mcr |= MCR::AUX_OUTPUT2;
+        read_end.mcr.write(mcr);
+        let ier = IER::RX_AVALIABLE;
+        read_end.ier.write(ier);
+    }
+
+    pub fn read(&mut self) -> Option<u8> {
+        let read_end = self.read_end();
+        let lsr = read_end.lsr.read();
+        if lsr.contains(LSR::DATA_AVAILABLE) {
+            Some(read_end.rbr.read())
+        } else {
+            None
+        }
+    }
+
+    pub fn write(&mut self, ch: u8) {
+        let write_end = self.write_end();
+        loop {
+            if write_end.lsr.read().contains(LSR::THR_EMPTY) {
+                write_end.thr.write(ch);
+                break;
+            }
+        }
+    }
+}
+
+struct NS16550aInner {
+    ns16550a: NS16550aRaw,
+    read_buffer: VecDeque<u8>,
+}
+
+pub struct NS16550a<const BASE_ADDR: usize> {
+    inner: UPIntrFreeCell<NS16550aInner>,
+    condvar: Condvar,
+}
+
+impl<const BASE_ADDR: usize> NS16550a<BASE_ADDR> {
+    pub fn new() -> Self {
+        let mut inner = NS16550aInner {
+            ns16550a: NS16550aRaw::new(BASE_ADDR),
+            read_buffer: VecDeque::new(),
+        };
+        inner.ns16550a.init();
+        Self {
+            inner: unsafe { UPIntrFreeCell::new(inner) },
+            condvar: Condvar::new(),
+        }
+    }
+}
+
+impl<const BASE_ADDR: usize> CharDevice for NS16550a<BASE_ADDR> {
+    fn read(&self) -> u8 {
+        loop {
+            let mut inner = self.inner.exclusive_access();
+            if let Some(ch) = inner.read_buffer.pop_front() {
+                return ch;
+            } else {
+                let task_cx_ptr = self.condvar.wait_no_sched();
+                drop(inner);
+                schedule(task_cx_ptr);
+            }
+        }
+    }
+    fn write(&self, ch: u8) {
+        let mut inner = self.inner.exclusive_access();
+        inner.ns16550a.write(ch);
+    }
+    fn handle_irq(&self) {
+        let mut count = 0;
+        self.inner.exclusive_session(|inner| {
+            while let Some(ch) = inner.ns16550a.read() {
+                count += 1;
+                inner.read_buffer.push_back(ch);
+            }
+        });
+        if count > 0 {
+            self.condvar.signal();
+        }
+    }
+}

os/src/drivers/mod.rs

@@ -1,3 +1,6 @@
 pub mod block;
+pub mod chardev;
+pub mod plic;
 
 pub use block::BLOCK_DEVICE;
+pub use chardev::UART;

os/src/drivers/plic.rs

@@ -0,0 +1,124 @@
+#[allow(clippy::upper_case_acronyms)]
+pub struct PLIC {
+    base_addr: usize,
+}
+
+#[derive(Copy, Clone)]
+pub enum IntrTargetPriority {
+    Machine = 0,
+    Supervisor = 1,
+}
+
+impl IntrTargetPriority {
+    pub fn supported_number() -> usize {
+        2
+    }
+}
+
+impl PLIC {
+    fn priority_ptr(&self, intr_source_id: usize) -> *mut u32 {
+        assert!(intr_source_id > 0 && intr_source_id <= 132);
+        (self.base_addr + intr_source_id * 4) as *mut u32
+    }
+    fn hart_id_with_priority(hart_id: usize, target_priority: IntrTargetPriority) -> usize {
+        let priority_num = IntrTargetPriority::supported_number();
+        hart_id * priority_num + target_priority as usize
+    }
+    fn enable_ptr(
+        &self,
+        hart_id: usize,
+        target_priority: IntrTargetPriority,
+        intr_source_id: usize,
+    ) -> (*mut u32, usize) {
+        let id = Self::hart_id_with_priority(hart_id, target_priority);
+        let (reg_id, reg_shift) = (intr_source_id / 32, intr_source_id % 32);
+        (
+            (self.base_addr + 0x2000 + 0x80 * id + 0x4 * reg_id) as *mut u32,
+            reg_shift,
+        )
+    }
+    fn threshold_ptr_of_hart_with_priority(
+        &self,
+        hart_id: usize,
+        target_priority: IntrTargetPriority,
+    ) -> *mut u32 {
+        let id = Self::hart_id_with_priority(hart_id, target_priority);
+        (self.base_addr + 0x20_0000 + 0x1000 * id) as *mut u32
+    }
+    fn claim_comp_ptr_of_hart_with_priority(
+        &self,
+        hart_id: usize,
+        target_priority: IntrTargetPriority,
+    ) -> *mut u32 {
+        let id = Self::hart_id_with_priority(hart_id, target_priority);
+        (self.base_addr + 0x20_0004 + 0x1000 * id) as *mut u32
+    }
+    pub unsafe fn new(base_addr: usize) -> Self {
+        Self { base_addr }
+    }
+    pub fn set_priority(&mut self, intr_source_id: usize, priority: u32) {
+        assert!(priority < 8);
+        unsafe {
+            self.priority_ptr(intr_source_id).write_volatile(priority);
+        }
+    }
+    #[allow(unused)]
+    pub fn get_priority(&mut self, intr_source_id: usize) -> u32 {
+        unsafe { self.priority_ptr(intr_source_id).read_volatile() & 7 }
+    }
+    pub fn enable(
+        &mut self,
+        hart_id: usize,
+        target_priority: IntrTargetPriority,
+        intr_source_id: usize,
+    ) {
+        let (reg_ptr, shift) = self.enable_ptr(hart_id, target_priority, intr_source_id);
+        unsafe {
+            reg_ptr.write_volatile(reg_ptr.read_volatile() | 1 << shift);
+        }
+    }
+    #[allow(unused)]
+    pub fn disable(
+        &mut self,
+        hart_id: usize,
+        target_priority: IntrTargetPriority,
+        intr_source_id: usize,
+    ) {
+        let (reg_ptr, shift) = self.enable_ptr(hart_id, target_priority, intr_source_id);
+        unsafe {
+            reg_ptr.write_volatile(reg_ptr.read_volatile() & (!(1u32 << shift)));
+        }
+    }
+    pub fn set_threshold(
+        &mut self,
+        hart_id: usize,
+        target_priority: IntrTargetPriority,
+        threshold: u32,
+    ) {
+        assert!(threshold < 8);
+        let threshold_ptr = self.threshold_ptr_of_hart_with_priority(hart_id, target_priority);
+        unsafe {
+            threshold_ptr.write_volatile(threshold);
+        }
+    }
+    #[allow(unused)]
+    pub fn get_threshold(&mut self, hart_id: usize, target_priority: IntrTargetPriority) -> u32 {
+        let threshold_ptr = self.threshold_ptr_of_hart_with_priority(hart_id, target_priority);
+        unsafe { threshold_ptr.read_volatile() & 7 }
+    }
+    pub fn claim(&mut self, hart_id: usize, target_priority: IntrTargetPriority) -> u32 {
+        let claim_comp_ptr = self.claim_comp_ptr_of_hart_with_priority(hart_id, target_priority);
+        unsafe { claim_comp_ptr.read_volatile() }
+    }
+    pub fn complete(
+        &mut self,
+        hart_id: usize,
+        target_priority: IntrTargetPriority,
+        completion: u32,
+    ) {
+        let claim_comp_ptr = self.claim_comp_ptr_of_hart_with_priority(hart_id, target_priority);
+        unsafe {
+            claim_comp_ptr.write_volatile(completion);
+        }
+    }
+}